Cadence Xcelium Multi-Snapshot Incremental Elaboration (MSIE): Enhancing Digital Design Verification Efficiency

Introduction to MSIE

Multi-Snapshot Incremental Elaboration (MSIE, Copyright Cadence Design Systems) is a powerful feature of Cadence Xcelium that optimizes the verification process for digital designs by enabling incremental changes to be elaborated without needing to re-elaborate the entire design. This approach significantly reduces the time required for compiling and elaborating designs, making verification faster and more efficient.

Typical simulation flow (without MSIE) 

The below figure depicts a traditional approach to running test scenarios in a design and verification environment. 


Each scenario involves three stages: Compilation of the environment (testbench + DUT), Elaboration of the compiled environment, and Simulation of the elaborated environment. This sequential process is repeated for each test scenario.

How MSIE Works

  • Primary and Incremental Snapshots: MSIE works by creating pre-elaborated snapshots of the design and testbench environment. When a change is made, only the modified portion of the design or testbench is re-elaborated. These changes are then combined with the existing snapshots during simulation.
  • Optimized Verification Cycles: By focusing on incremental changes, MSIE reduces the need to reprocess the entire environment, providing faster simulation and feedback loops. This is particularly beneficial in environments with frequent changes or during the debugging phase, where rapid iterations are necessary.

Case study - a large SoC 

We will share our experience of deploying MSIE on a large SoC design in a follow-up article. An indicative SoC architecture is shown below (credit: 
https://th.bing.com/th/id/OIP.mH1EKtHl8nHWyiVQOfKQIgAAAA?rs=1&pid=ImgDetMain)



As a teaser, below graph summarizes our results. 

Stay tuned for these exciting results!

 

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