Opensource VHDL simulator - NVC, installing on WSL-Ubuntu
We at AsFigo AsFigo love Opensource. Off late we have been helping some European customers adopt modern verification techniques using VHDL. As a byproduct we have been building a Python based VHDL utility to generate a generic testbench based on OSVVM. While doing so, our team stumbled upon few subtle simulator issues, see:
https://osvvm.org/forums/topic/sbrd-package-issue-with-modelsim-fpga-edition
Hence, we wanted to try out NVC - a relatively new opensource VHDL compiler (https://www.nickg.me.uk/nvc/index.html). While there are pre-built binaries for several OS there, we couldn't locate one for WSL - Windows + WSL running Ubuntu. So, we decided to build it from source - isn't it the best thing about opensource - build missing pieces yourself?
So here is an Engineer's diary of how we got it up and running in less than 15 minutes! Fasten your seatbelt, off we go!
Follow the below steps:
- Grab the latest NVC tar ball from: https://github.com/nickg/nvc/releases/ . In our case we pulled: https://github.com/nickg/nvc/releases/download/r1.12.2/nvc-1.12.2.tar.gz
- tar xvfz nvc-1.12.2.tar.gz
- cd nvc-1.12.2
- mkdir build
- cd build/
- sudo apt install llvm pkg-config libzstd-dev libdw-dev
- ../configure
- make
- sudo make install
library ieee;use ieee.std_logic_1164.all;use ieee.std_logic_textio.all;use std.textio.all;entity hw isend entity;architecture Behavioral of hw isbeginprocessvariable L : line;begin-- Write "Hello, World!" to the consolewrite(L, string'("Hello, World!"));writeline(output, L);-- Stop simulationwait;end process;end architecture;
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