MathLib - introduction

 Chip design industry is the key enabler for many of the modern-day electronic devices that we use day to day. Very likely, you are reading this very article on a device that has multiple "chips" (or integrated circuits/ICs) built using various techniques. Mathematical models are central to these systems especially in domains such as Biomedical engineering, automotive, 5G, etc. System Designers typically capture such models using MATLAB©, Octave, etc. These models leverage a rich set of functions built-in as part of these tools. Developing hardware designs is a niche skill set with SystemVerilog and UVM being used mostly to verify such designs prior to "production en masse”.

MathLib is a library of mathematical functions similar to those available with Matlab/Octave but implemented in native SystemVerilog. With MathLib, once can run higher level reference models erstwhile coded in Matlab language in native SystemVerilog. This leads to direct cost saving for chip design engineers as they don't need expensive licenses especially with opensource EDA tools becoming fully available.

In this series of articles, we will share our learnings over past several years in helping customers design and verify complex analog and mixed signal designs, biomedical systems etc.

So stay tuned for more on MathLib, Welcome Onboard! 

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